1. Field of the Invention
This invention relates to an electrical circuit for outputting a high voltage signal, and more particularly to an electrical circuit suited for being formed in a semiconductor integrated circuit.
2. Description of the Prior Art
The present invention will be hereinafter explained with respect to flat panel displays, such as a PDP (Plasma Display Panel), an ELD (Electroluminescence Display) and a dot matrix VFD (Vacuum Fluorescent Display), as the apparatus in which the electrical circuit according to the present invention is used. In accordance with the recent development of office automation, the flat panel displays are desired for practical use. Those flat panel displays are driven with a high voltage (100.about.250 volts) signal. Moreover, such driving signal must be applied for each one of the dots in the panel displays. In other words, in a panel display having display dots of a matrix of 512.times.512, 1024 high voltage drive circuits are necessary. Many problems in manufacturing cost, size and power consumption have arisen in the manufacture of such a large number of high voltage drive circuits, especially in manufacturing them in the form of an integrated circuit.
More specifically, the circuit might be formed by a C-MOS output circuit in which P- and N-channel MOS FET's are connected in series between high voltage power terminals. An input signal was applied to the gates of the two MOS FET's, after it was subjected to signal processing for driving the panel displays. This idea was not practical, because the achievement of a high gate withstand voltage, i.e. threshold voltage, required for the two MOS FET's was very difficult. An improvement of the C-MOS output circuit has been proposed which used two inverters to apply appropriately biased input signals to the respective gates of the P- and N-channel MOS FET's in the C-MOS output circuit. After an input signal was subjected to signal processing, it was applied to the gate of the N-channel MOS FET in the C-MOS output circuit through an inverter, while it was once applied to another inverter composed of an N-channel MOS FET and two series-connected load resistors and then applied to the gate of the P-channel MOS FET from the connecting point of the two load resistors. The voltage swing at the gates of the C-MOS output circuit was made small by the inverters, resulting in the formation of a C-MOS output circuit with P- and N-channel MOS FET's having lower gate withstand voltages. This improvement, however, had some other problems including a relatively low operation speed due to time delays in the inverters and a large power consumption in the series-connected load resistors.
A further improvement was proposed in Japanese Unexamined Patent Publication No. 55-136726 by the inventor of the present invention and its application to a semiconductor integrated circuit has been announced in "IEDM Technical Digest '82" pages 254 to 257. After an input signal was subjected to many signal processings, it was applied to the gate of an N-channel MOS FET in the C-MOS output circuit, while it was applied through a capacitor to the gate of a P-channel MOS FET in which a parallel circuit of a forward-biased diode and a resistor was connected between the gate and the source thereof. Since the gate of the P-channel MOS FET was biased by the parallel circuit, very little power was consumed by the resistor, resulting in savings in power. Furthermore, the input signal was transmitted to the gate of the P-channel MOS FET through a capacitor only, resulting in high speed operability.
However, the capacitor is an element which is hard to form in a semiconductor integrated circuit. The usage of such a capacitor created a new problem that the whole circuit could not be formed in a semiconductor integrated circuit and that, when the circuit was formed in a semiconductor integrated circuit, a large number of external circuit elements, such as the capacitors, and external wirings could not be avoided to drive a large number of dots in a panel display. The number of external circuit elements and external wirings caused an increase in cost and a made it impossible to have a compact circuit.